ARM, the high -performance version of the CPU IP design for DC and DC announces "Neoverse V1" and "Neoverse N2" that supports ARMV9 Up to 256 cores can be realized by supporting the new interconnect "CMN-700"

ARM claims that the performance in pre -silicon will exceed the 3rd generation Xeon SP and the 3rd generation EPYC.

ARM has published the expected performance of Neoverse V1, NEOVERSE N2 measured at the pre -silicon (simulation stage before dropping into the actual semiconductor).That is the integer operative performance (SPEC CPU 2017) measured by ARM (SPEC CPU 2017) and the integer performances (SPEC CPU 2017) during multi -threading per socket.There are four types: 2020 (24c/48T), Traditional 2021 (64C/128T), and Traditional 2020 (64C/128T), which are as follows.

Traditional 2021 (40C/80T): Intel 3rd generation Xeon SP (not written) Traditional 2020 (24C/48T): Intel 2nd generation Xeon SP (8268) Traditional 2021 (64C/128T): AMD3rd generation EPYC (7763) Traditional 2020 (64C/128T): AMD 2nd generation EPYC (7742)

ARM claims that the performance at the time of the singing thread has already surpassed Intel's third -generation Xeon SP in NEOVERSE N1, from which NEOVERSE V1 and NEOVERSE N2 exceeded it.

In addition, in the performance at the time of the multi -threaded socket, 64 core Neoverse N1 was lower than the X86 processor, but Neoverse V1 and 128 core Neoverse N2, which have 96 cores, are greatly exceeding them.There is.

Of course, these data will be compared with the current competitive products.ARM explains the appearance of product samples equipped with Neoverse V1 and Neoverse N2 this year, and it is highly likely that the actual product will be on the market in 2022.

In that sense, it is noteworthy that Intel's Sapphire Rapids (Sapphire Lapids), which Intel is launched in 2022, and the AMD's performance difference between GENOA (Genoa) introduced in 2022.